Technical Working Groups
Events
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Year-End Member Meeting, December 3, 2024
December 3, 2024, 09:00-13:30
Grand Ballroom 1, 3rd Floor, East Wing, Sheraton Hsinchu Hotel
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Core Member Meeting: Enabling Precise Strategies & Effective Collaboration, June 24, 2024
August 28, 2024, 09:00-13:30
Grand Ballroom 3, 3rd Floor, East Wing, Sheraton Hsinchu Hotel
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Executive Luncheon: Market Insights Exchange, June 24, 2024
June 24, 2024, 10:30-13:30
Grand Ballroom 3, 3rd Floor, East Wing, Sheraton Hsinchu Hotel
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Core Member Meeting, March 27, 2024
March 27, 2024, 09:00-13:00
Grand Ballroom 1, 3rd Floor, East Wing, Sheraton Hsinchu Hotel
About Hi-CHIP
With the rapid development of advanced manufacturing processes, IC design cycle and cost have increased significantly. For example, the design cycle of 7 nanometers is twice that of 28 nanometers, the design cost is more than US $300 million, and the design cost of 5 nanometers will exceed US $500 million. As a result, the efficiency of the chip will fall into a slow growth trend. Therefore, multi-dimensional chip design and heterogeneous integrated packaging architecture will be the most important development path of semiconductors in the future. At the same time, AI and 5g detonate various emerging technology applications, facing different circuits in the same package
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