Heterogeneous Integration and Chiplet System Package Alliance

Robust implementations are a major issue, particularly as memory density increases.

Experts at the Table: Semiconductor Engineering sat down to talk about the impact of power and heat on off-chip memory, and what can be done to optimize performance, with Frank Ferro, group director, product management at Cadence; Steven Woo, fellow and distinguished inventor at Rambus; Jongsin Yun, memory technologist at Siemens EDA; Randy White, memory solutions program manager at Keysight; and Frank Schirrmeister, vice president of solutions and business development at Arteris. What follows are excerpts of that conversation. Part one of this discussion is here. Part two is here.

For more details, please follow the link below：【Memory’s Future Hinges On Reliability】