The Inaugural Meeting of Hi-CHIP, August 30, 2023
- Date : 2023-10-31
- Source:Heterogeneous Integration and Chiplet System Package Alliance
- Views :200
- Event date
- August 30, 2023, 13:00-16:30
- Event Location
- CHANG YUNG-FA FOUNDATION International Convention Center. 8F
- Organizer
- Hi-CHIP Alliance
ITRI Leads Global Semiconductor Collaboration for Heterogeneous Integration to Pioneer Pilot Production Solutions
Hsinchu, Taiwan—September 15, 2023—The introduction of Generative AI (GAI) has significantly increased the demand for advanced semiconductor chips, drawing increased attention to the development of complex calculations for large-scale AI models and high-speed transmission interfaces. To assist the industry in grasping the key to high-end semiconductor manufacturing and integration capabilities, the Heterogeneous Integrated Chiplet System Package (Hi-CHIP) Alliance brings together leading semiconductor companies from Taiwan and around the world to provide comprehensive services, spanning from packaging design, testing and verification, to pilot production. Since its establishment in 2021, the alliance has accumulated important industry players as its members, including EVG, Kulicke and Soffa (K&S), USI, Raytek Semiconductor, Unimicron, DuPont, and Brewer Science. Looking forward, the alliance is set to actively explore its global market potential.
Dr. Shih-Chieh Chang, General Director of Electronic and Optoelectronic System Research Laboratories at ITRI and Chairman of the Hi-CHIP Alliance, indicated that advanced manufacturing processes have led to a considerable increase in IC design cycles and costs. Multi-dimensional chip design and heterogeneous integrated packaging architecture are key tools to tackle this demand in semiconductors. On top of that, the advent of GAI such as ChatGPT, which demands substantial computing power and transmission speed, requires even higher levels of integration capacity in chip manufacturing. ITRI has been committed to developing manufacturing technologies and upgrading materials and equipment to enhance heterogeneous integration technologies. Achievements include the fan-out wafer level packaging (FOWLP), 2.5 and 3D chips, embedded interposer connections (EIC), and programmable packages. With both local and foreign semiconductor manufacturer members, the Hi-CHIP Alliance is establishing an advanced packaging process production line to provide an integrated one-stop service platform.
Nicky Lu, Chair of the AI-on-Chip Taiwan Alliance (AITA), highlighted AITA's objectives, which encompass building an AI ecosystem, jointly developing critical technologies, and fostering collaboration to accelerate AI chip hardware, software, and product development. As a vital component of AITA, the Hi-CHIP Alliance brings together significant semiconductor players from Taiwan and overseas. USI, Raytek, and Unimicron are currently serving as the general coordinators for the Hi-CHIP Alliance to connect related industries through AITA. This collaboration seeks to establish a common verification platform, create a 3D/FO common technology platform, develop customized adoption models, and core manufacturing process capabilities. The objective is to nurture international partnerships, fuel technological advancements in equipment and materials, and propel the semiconductor industry to new horizons.